TT-RAM

Table of Content



1. BURST versus NON-BURST modes

The following is a usenet post from Howard Chu.


Joe Mirando wrote:

Can anyone enlighten me as to the purpose of TT-RAM "burstmode"? I'm in the process of increasing TT-RAM from 4 to 16 meg and saw the burst/no burst jumper on the RAM board, but have no idea what the difference is.

Burst mode requires special SIMMs to operate. They used to be called nybble-mode DRAMs, but (practically) no one in the memory industry today sells them or has even heard of them. I'm told that EDO memory now common on PCs uses the same concept, but I don't know if they are directly compatible.

The fully gory discussion requires an explanation of CPU memory accesses, bus timing, and other such info, but can be distilled into this much:

Ordinarily, when a CPU wanted to get something from memory, it would first have to assert an address for some number of bus cycles, and then the word of data would become available some number of cycles later. For every word being accessed, an address had to be asserted first. In burst mode, the CPU asserts an address and a special "burst" signal, and the memory system returns the word at the requested address first, and then on the following three bus cycles it returns the following three words, in rapid succession. This saves the setup time that normally goes with asserting the address, etc.

On a 68000, a byte or word memory access always required 4 cycles. On 68020 this could usually be cut down to 3 cycles, and longwords could also be accessed in this amount of time. On 68030 in burst mode, you can get the first longword in 4 cycles, and then 3 more longwords in 3 more cycles, so instead of 12-16 cycles, you're only using 7.

There are several restrictions, of course - you must start from a 4-word aligned address (i.e., memory addresses that are integral multiples of 4), you must be doing 32-bit (longword) accesses, and the memory system must support synchronous bus cycles. Also the 68030 only performs burst accesses on read operations, specifically for filling its instruction cache. On 68040, a MOVE16 instruction was added that allowed reads & writes of 16 byte chunks of data (as opposed to just instructions) in burst mode.

Btw, in case it wasn't obvious before, the memory is called "nybble-mode" because each chip returns 4 bits of data on a burst request, instead of just 1 bit. And on 8 or 9 chip SIMMs, there are 8 chips because each chip stores a single bit of a particular data byte. (The 9th chip stores parity bits when it's being used.)

As you can see, the 68030 burst implementation has very limited impact on overall system performance. For code that does not loop, or that does not fit inside the instruction cache, instruction fetches can occur almost 180% faster than otherwise. Data fetches aren't improved though, and code that is already in the instruction cache is already running as fast as possible.



2. Atari daughterboards

The following document was submitted by Dennis Armstrong.
Thanks to Frank Lockwood for putting me in touch with Dennis.


Atari produced two TT memory boards:


Atari 4 MB TT-RAM board

The Atari TT fastram board CA400312-xxx has three jumpers marked W1, W2 and W3. These are used to select starting address and mode:

Address Mode jumper W3
NON-BURST 1 - 2
BURST 2 - 3

The starting address is set with the following jumpers:

Starting Address jumper W1 jumper W2
$0100 0000 2 - 3 2 - 3
$0140 0000 1 - 2 2 - 3
$0180 0000 2 - 3 1 - 2
$01C0 0000 1 - 2 1 - 2

Location:

      pin 32               pin 12
           _________________              ---------
  pin 33   |               | pin 11  pin 1|       |
           |               |              |       |
           |               |              |       |
           |    TTFMCU     |              | RP101 |
           |               |              ---------
           |               |              ---------
  pin 53   |               | pin 75       | RP102 |
           ----------------               |       |
      pin 54               pin 74         |       |
                                          |       |
                W3                        |       |
                W2                        _________
                W1

          |     |     |     |
          |     |     |     |
          |     |     |     |
SIMMs --> |     |     |     |
          |     |     |     |
          |     |     |     |

It is possible to upgrade this board to use 4 MB SIMMS for 16MB of TT-RAM, by performing the following instructions:


Upgrading CA400312 cards to 16 Mb

The upgrade is for the Atari TT fastram board CA400312 which has three jumpers marked W1, W2 and W3.

If you have SIPPs which are soldered to the PCB then you will have to obtain 4 SIMM holders. remove the SIPPs from the board by desoldering them and solder the SIMM holders in their place. Be carefull about the correct orientation of the holders.

The pins on the SIPPs can be removed, by desoldering, the resurrected SIMMS can be placed in the SIMM holders and the board replaced in the computer to check that everything is still OK.


  1. Remove the four 1Mb SIMMs.
  2. Cut the PCB track between the the 47ohm resistor pack (RP101) pin 1 and the TTFMCU pin 10 (MAD0). There is only one connection between these pins.
  3. Make sure that pin 19 of the SIMM holders are not connected. Connect each of the A10 address lines of the SIMM holders pin 19 together. and connect this wire to one end of a 47ohm resistor. The other end of the 47ohm resistor is connected to pin 10 of the TTFMCU (MAD0). This pin should not be connected to any other before the resistor was connected.
  4. Connect pin 1 of resistor pack RP101 to TTFMCU pin 73 (MAD10)
  5. Jumper W1 should be connected 2 - 3 (equvalent to jumper W103) jumper W2 should be connected 2 - 3 (equvalent to jumper W104) this gives a starting address of $0100 0000 for the fastram.
  6. Connect a 820 ohm resistor from pin 62 of TTFMCU (*STERM) to +5v (VCC) +5v (VCC) is availiable on the connector J101B pins 37,38,39,40,57,58,59 and 60 or on the TTFMCU (U101) at pins 3,7,12,54,70,75,79 and 83.
  7. Disconnect pin 52 of TTFMCU (M4X1) from 0Volts (Gnd) and connect to +5V if required (equvalent to jumper W106 on the newer TTram card).
  8. Insert the 4Mb SIMMs and replace in tha Atari.

This has been prepared from the circuit schematics only, I don't have the Atari TT fastram board (I bought the GE SOFT one) to check the PCB traces.

If you succeed with the upgrade please post the note to usenet. The TTFMCU is used in both the old (4M) and new (4M/16M) PCBs so this upgrade should work.



Atari 4/16MB TT-RAM board

The Atari TT-RAM board (CA401058-xxx) uses 30 pin SIMMs. The SIMMs may be 1M x 8 or 4M x 8 (9 bit SIMMs may also be used). All 4 SIMM slots should have the same type (ie. 1M or 4M). 1M SIMMs give a total of 4Mb of fast ram, 4M SIMMs give a total of 16Mb.

The jumpers required are as follows:

SIMM type jumper W101 jumper W102 jumper W106
1M x 8 2 - 3 2 - 3 2 - 3
4M x 8 1 - 2 1 - 2 1 - 2

Starting RAM address jumper W103 jumper W104
$0100 0000 2 - 3 2 - 3

Address Mode jumper W105
NON-BURST 1 - 2
BURST 2 - 3 (default)

Location:

                |   mmu chip   |
                |              |
                ________________
                      W105
                 W106 W104
                      W103
                      W102
                      W101
                |    |    |    |
                |    |    |    |
  SIMM slots -> |    |    |    |
                |    |    |    |
                |    |    |    |

It is possible that during manufacture there was a shortage of SIMM holders and SIPPs were used. The pinout is identical to SIMMs but pins were soldered to the connectors. If this is the case then you will have to purchase some SIMM holders if you require to change the configuration.




3. AixTT daughterboard

Aixit Gmbh, Hüttenstrasse 46, D-52068 Aachen, Germany
http://www.aixit.com

AixTT 64 MB

This card accepts 2 standard 72-pin SIMM modules of 4, 8, 16 or 32 MB. Bank 0 must be equal to or larger than Bank 1. The card requires fast-page (FPM) type of RAM and cannot use EDO. Parity is not important and is ignored anyway.

Beware that some SIMMs are manufactured without the grounding pads that indicate the storage capacity. If the TT-RAM size shown at bootup is incorrect, then your SIMMs most probably don't have them...

Warning: do not use 32 Mb SIMMs assembled with xxx164xx chips; they are incompatible.

The documentation provided by Aixit was in German, but Computer Direct added their English translation.

Status: discontinued. Replaced in December 1998 by a 256 MB version.


AixTT 256 MB

This card accepts 2 standard 72-pin SIMM modules of 16, 32, 64 or 128 MB. It replaces the previous version, by eliminating support for smaller SIMM sizes.

Status: discontinued in September 1999. No additional production run is currently planned.



4. GE-SOFT daughterboard

The following document was submitted by Dennis Armstrong.
Thanks to Frank Lockwood for putting me in touch with Dennis.

GE-SOFT Computersysteme mbH, Landgrafenstr. 37-39, D-5210 Troisdoef, Germany
Tel 02241 40-63-89 FAX 02241 40-65-89

This board has space for 8 off 30 Pin SIMMS. The SIMMs may be 1M x 8 or 4M x 8 (9 bit SIMMs may also be used). All 4 SIMM slots in bank 0 or bank 1 should have the same type (ie. 1M or 4M). 1M SIMMs give a total of 4 MB of fast ram, 4M SIMMs give a total of 16Mb.

The SIMMs should be of the Page mode type, the board is only guaranteed to work with Toshiba or Samsung SIMMS.

Two Jumpers are provided to select the memory configuration:

JP0 JP1 Bank 0 Bank 1
2 - 3 2 - 3 4Mb 4MB or None
1 - 2 2 - 3 16Mb None
2 - 3 1 - 2 16Mb 4MB
1 - 2 1 - 2 16Mb 16MB

Location:

      JP0 123              bank 1
      JP1 123           -------------
                           bank 1
                        -------------
           bank 1          bank 1
       --------------   -------------
           bank 0          bank 0
       --------------   -------------
                           bank 0
                        -------------
                           bank 0
                        -------------